Jack Whitham

Software Engineer

Virtual Trace Experiment Software

This page has links to the software that I wrote for my paper "Predictable Out-of-order Execution Using Virtual Traces", published in the proceedings of the RTSS 2008 conference. Virtual traces allow a complex out-of-order processor (such as the O3 CPU in the M5 simulator) to be constrained for predictable operation. This allows exact execution time analysis to be performed for programs even when superscalar and out-of-order processing is used.

You can use this software to reproduce my results and make further modifications to M5 and the O3+VTC CPU, which is the O3 CPU plus the virtual trace controller (VTC) described in my paper. The software is a patch that must be applied to the M5 source code. It is GNU licensed.

There are two versions of the patch. One is for M5 version 2.0b4 - this is the version I used to generate the results in the paper. The other is for M5 version 2.0b5. It generates slightly different results due to changes within the CPU core. Various bugs were fixed by the M5 programmers. One bug that affected the VTC was in src/cpu/o3/inst_queue_impl.hh; it hid an additional source of timing noise which is removed in the 2.0b5 patch.

To use this patch you will need:

  • M5 source code, version 2.0b4 or 2.0b5.
  • The benchmark archive (below). This contains the compiled subset of the Malardalen WCET benchmarks used for my paper.
  • All of the prerequisites for compiling M5, such as Python and scons.

Refer to the "PATCH_NOTE" file (created by applying the patch) for further instructions. The patch is applied using the "patch" utility in Linux - if this is unfamiliar to you, read the man pages for "patch".

On a 2.4GHz Intel Core 2 PC, the experiments should take between 7 and 8 CPU hours to execute. You should make sure you have several gigabytes of free disk space as large log files are created.

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